1. Field of the Invention
The present invention relates to a current sensing circuit of MOSFET. More particularly, the present invention relates to a current sensing circuit that can prevent any operation error due to a rush current or a shifted sense ratio at the rising edge of a gate signal of a MOSFET and also any operation error that can arise when it is widely on duty as well as any ASO destruction of a sense MOSFET at a falling edge of a gate signal of a MOSFET.
2. Description of the Related Art
Patent Document 1 (U.S. Pat. No. 4,553,084) describes a known current sensing circuit, or a current sensing means, for sensing the electric current flowing through a power MOSFET (metal oxide semiconductor field effect transistor) by means of a sense MOSFET and a sense resistor. With the prior art technique, a plurality of small capacity MOSFETs, each being referred to as cell, are connected in parallel to form a power MOSFET and a single sense MOSFET, or a single cell, is connected in parallel to the power MOSFET and arranged on a same semiconductor chip. Since the large number of cells are manufactured through a same manufacturing process and hence have same characteristics in common, electric currents flow respectively through the power MOSFET and the sense MOSFET as a voltage is applied between the gate and source of each of the cells and the intensities of the electric currents are proportional to the number of cells. If the ratio of the number of cells of the power MOSFET to the number of cells of the sense MOSFET is 3,000:1, the intensities of the electric currents also show a ratio of 3,000:1. Since the intensity of the electric current flowing through the sense MOSFET is proportional to that of the electric current flowing through the power MOSFET, the sense signal obtained by sensing the electric current flowing through the sense MOSFET by means of a sense resistor can be utilized as sense signal for a limiter for limiting a load current.
When a known current sensing circuit of the above described type is applied to sensing the electric current of the power MOSFET of a step-down DC-DC converter, the over-current protection circuit and the control circuit can react to commit an operation error the moment when the high-side MOSFET is turned on because it can also sense the rush current due to the recovery performance of a free wheel diode.
Additionally, the sense ratio (=sense MOSFET current/power MOSFET current) is above a steady value when the gate-source voltage Vgs is increasing/decreasing. For this reason, a large electric current flows through the sense MOSFET to make the over-current protection circuit fall into an operation error. To avoid this problem, a countermeasure such as providing a masking time to disregard the time period during which an excessive sense current flows or inserting a large filter in the current sensing circuit at a position downstream to the sense resistor may be required.
The relationship between the sense ratio in steady state and the sense ratio when the gate-source voltage Vgs is increasing/decreasing will be described below by referring to FIGS. 1 and 2.
FIG. 1 is an exemplar circuit diagram of a known current sensing circuit 4 applied to sensing the electric current of the power MOSFET of a step-down DC-DC converter, showing the circuit configuration thereof. FIG. 2 is a chart showing the signal waveforms and the operation waveforms of different sections of the circuit of FIG. 1.
Referring to FIG. 1, reference symbol Qph denotes a power MOSFET that is designed to operate as high-side switching device while reference symbol Qs denotes a sense MOSFET that is designed to sense the electric current of the power MOSFET. The source terminal of the power MOSFET Qph and that of the sense MOSFET Qs are connected to each other and the drain terminal of the power MOSFET Qph is connected to a DC power source Vin. The drain terminal of the sense MOSFET Qs is connected to the DC power source Vin by way of a sense resistor Rs. The connection point where the source terminal of the power MOSFET Qph and that of the sense MOSFET Qs are connected is by turn connected to an output terminal O by way of a reactor L. A free wheel diode Df is connected between the connection point where the source terminal of the power MOSFET Qph and that of the sense MOSFET Qs are connected and a grounding terminal and a smoothing capacitor C and a load RL are connected between the output terminal O and the grounding terminal. The reactor L and the smoothing capacitor C form a DC smoothing circuit at the output section of the step-down DC-DC converter. The sense resistor Rs is connected at the opposite ends thereof to the inverting terminal (−) and the non-inverting terminal (+) of a current sensing circuit OTA (operational transconductance amplifier: an amplifier for converting a voltage into a current). The current sensing circuit OTA detects any voltage fall of the sense resistor Rs and outputs it as a current signal. A drive signal Sg1 is input to the gate of the power MOSFET Qph and that of the sense MOSFET Qs through a buffer circuit Bf so as to control the power MOSFET Qph and the sense MOSFET Qs for on and off.
Sense ratio is defined as [sense MOSFET current Is/power MOSFET current Ip] and the problems of the conventional art will be examined below by using the sense ratio that is expressed in terms of the resistance value of the power MOSFET Qph, that of the sense MOSFET Qs and that of the sense resistor Rs.
When the on-resistance of the power MOSFET Qph is Rqp, that of the sense MOSFET Qs is Rqs and the voltage at the connection point where the source terminal of power MOSFET Qph and that of the sense MOSFET Qs are connected is Vsw, the following equations hold true:Ip=(Vin−Vsw)/Rqp andIs=(Vin—Vsw)/(Rqs+Rs).
Hence, the sense ratio Is/Ip=Rqp/(Rqs+Rs).
Assume here that Rqs=10Ω, Rqp=1Ω and Rs=10Ω while the gate-source voltage Vgs is sufficiently high (and in steady state after a gate signal is input), the sense ratio will be expressed as
                              sense          ⁢                                          ⁢          ratio          ⁢                                          ⁢                      Is            /            Ip                          =                ⁢                  Rqp          /                      (                          Rqs              +              Rs                        )                                                  =                ⁢                  1          /                      (                          10              +              10                        )                                                  =                ⁢                  1          /          20.                    
On the other hand, while the gate-source voltage Vgs is increasing/decreasing, for the on-resistance of MOSFET to be high (assuming that Rqs=100Ω and Rqp=10Ω because the ratio of Rqs and Rqp does not change) and the resistance of the sense resistor Rs to be fixed, the sense ratio will be expressed as
                              sense          ⁢                                          ⁢          ratio          ⁢                                          ⁢                      Is            /            Ip                          =                ⁢                  Rqp          /                      (                          Rqs              +              Rs                        )                                                  =                ⁢                  10          /                      (                          100              +              10                        )                                                  =                ⁢                  1          /          11.                    
In other words, it is greater than the value in steady state, or 1/20.
Thus, it will be seen that the sense ratio will be high while the gate-source voltage Vgs is increasing/decreasing if compared with the sense ratio in steady state after a gate signal is input.
As the sense ratio changes, the sense ratio of the circuit and the current waveform of the sense MOSFET Qs shown in FIG. 1 will become those shown in FIG. 2. The waveforms in FIG. 2 are from above that of drive signal Sg1, that of the gate-source voltage Vgs_p of the power MOSFET, that of the gate-source voltage Vgs_s of the sense MOSFET, that of the voltage Vsw at the connection point of the source terminal of the power MOSFET Qph and that of the sense MOSFET Qs, that of the sense ratio Is/Ip and that of the electric current Is of the sense MOSFET Qs.
As drive signal Sg1 is input at clock time t1 and gets to a high level, both the gate-source voltage Vgs_p of the power MOSFET and that of the gate-source voltage Vgs_s of the sense MOSFET Qs rise and, when they get to threshold value Vth at clock time t2, the power MOSFET Qph and the sense MOSFET Qs start to become on. As the sense MOSFET Qs becomes on, the voltage Vsw of the connection point where the source terminal of the power MOSFET Qph and that of the sense MOSFET Qs are connected starts rising. As the voltage Vsw rises, a rush current flows to the free wheel diode Df due to its recovery performance immediately after the power MOSFET Qph becomes on.
As the sense MOSFET Qs becomes on, an electric current is sensed due to the sense resistance and the sense ratio Is/Ip rises (the part indicated by A in FIG. 2) while the gate-source voltage Vgs is increasing until it gets a steady value at clock time t3 (period t2 and t3). On the other hand, as the input of the drive signal Sg1 is stopped at clock time t4 and the signal gets to a low level, both the gate-source voltage Vgs_p of the power MOSFET and that of the gate-source voltage Vgs_s of the sense MOSFET fall and both the power MOSFET Qph and the sense MOSFET Qs become off when their voltages get to threshold value Vth at clock time t5. At this time, a circulating current flows to the free wheel diode Df due to the induced electromotive force of the reactor L. The voltage Vsw of the connection point where the source terminal of the power MOSFET Qph and that of the sense MOSFET Qs are connected to each other becomes a negative potential that is negative by the forward voltage of the free wheel diode Df. However, the voltage Vsw is assumed here to be equal to 0V for the sake of simplicity of the following explanation. The sense ratio Is/Ip rises even while the gate-source voltage Vgs is falling during the period between t4 and t5 (the part indicated by B in FIG. 2). As pointed out above, the sense ratio Is/Ip rises during the period between t2 and t3 and also during the period between t4 and t5 to produce edges indicated by A and B.
The electric current Is of the conventional art sense MOSFET produces “edges” indicated by A′ and B′ in FIG. 2 respectively in the period between t2 and t3 and in the period between t4 and t5. The edge A′ is attributable to that a rush current flows in addition to that the sense ratio becomes large and shows a value greater than the edge B′. Note that the current waveform of the sense MOSFET in the period between t3 and t4 is an inclined line because voltage Vsw is applied to the reactor L.
Thus, it will be understood that the conventional art current sensing circuit involves a large error in the current sensing signal when the gate-source voltage Vgs is increasing/decreasing.